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(parent: fcc89c7) | patch
Add acpi C3 support for x86.
authorKeir Fraser <keir.fraser@citrix.com>
Thu, 1 May 2008 09:46:59 +0000 (10:46 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Thu, 1 May 2008 09:46:59 +0000 (10:46 +0100)
commitdff7c01f7cc1e54d0adcbb773804d071abcda711
tree140365d05253c7b091e09334545ad3b1bf24ce0ftree | snapshot
parentfcc89c74e03ccd7bd44437f59dae46cb4c1d95dfcommit | diff
Add acpi C3 support for x86.

C3 & deep C state will need to do ARB_DIS or cache flush. ARB_DIS
should be done within the last cpu which is ready for C3. Bus master
activities are checked and recorded for C state promotion/demotion
judgement.

C3 is disabled by default, till TSC/APIC stop issues resolved.
Adding cmdline option "max_cstate=3" can enable C3.

Signed-off-by: Wei Gang <gang.wei@intel.com>
xen/arch/x86/acpi/cpu_idle.c diff | blob | history
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